Optimum channel thickness in pentacene-based thin-film transistors

Lee, Jiyoul; Kim, Kibum; Kim, Jae Hoon; Im, Seongil; Jung, Duk-Young
June 2003
Applied Physics Letters;6/9/2003, Vol. 82 Issue 23, p4169
Academic Journal
We report on the influence of pentacene channel thickness on the field-effect hole mobility in pentacene-based thin-film transistors (TFTs) that employ the top-contact mode for the source/drain electrodes. Our pentacene channel layers were deposited in the thickness range of 16-90 nm by thermal evaporation on 450 nm thick Al[SUB2]O[SUB3+x] dielectric films. The TFTs with increasingly thinner pentacene layers displayed correspondingly higher hole mobility, but an optimum thickness was determined to be about 30 nm because the TFTs with pentacene layers thinner than 30 nm exhibited high leakage current in the off-state bias regime. After a proper chemical treatment was performed onto the Al[SUB2]O[SUB3+x] gate dielectric, our optimized TFT with a 30 nm thick pentacene channel exhibited high mobility of ∼ 0.2 cm[SUP2]/V s with an on/off current ratio of 10[SUP5].


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