TITLE

Morphology and electronic transport of polycrystalline pentacene thin-film transistors

AUTHOR(S)
Knipp, D.; Street, R. A.; Völkel, A. R.
PUB. DATE
June 2003
SOURCE
Applied Physics Letters;6/2/2003, Vol. 82 Issue 22, p3907
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
Temperature-dependent measurements of thin-film transistors were performed to gain insight in the electronic transport of polycrystalline pentacene. Devices were fabricated with plasma-enhanced chemical vapor deposited silicon nitride gate dielectrics. The influence of the dielectric roughness and the deposition temperature of the thermally evaporated pentacene films were studied. Although films on rougher gate dielectrics and films prepared at low deposition temperatures exhibit similar grain size, the electronic properties are different. Increasing the dielectric roughness reduces the free carrier mobility, while low substrate temperature leads to more and deeper hole traps. © 2003 American Institute of Physics.
ACCESSION #
9885200

 

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