TITLE

Deep trench structures in silicon for sensitivity enhancement of Si/SiO2 interface studies

AUTHOR(S)
Stathis, J. H.; Bassous, E.; Scott, B. A.
PUB. DATE
August 1988
SOURCE
Applied Physics Letters;8/29/1988, Vol. 53 Issue 9, p794
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
The measurement of defects at the silicon-insulator interface by most spectroscopic techniques is difficult because of their low concentration. A novel structure has been fabricated by etching a dense array of deep trenches through a silicon wafer. All the sidewalls in this structure are {111} surfaces, and the surface area is greatly enhanced compared to that of a polished wafer of equivalent size. We have grown an oxide on this structure and have achieved better than an order of magnitude increase in the sensitivity of electron paramagnetic resonance measurements of Pb defects at the SiO2-Si(111) interface.
ACCESSION #
9827848

 

Related Articles

  • Thinning of silicon-on-insulator wafers by numerically controlled plasma chemical vaporization machining. Mori, Yuzo; Yamamura, Kazuya; Sano, Yasuhisa // Review of Scientific Instruments;Apr2004, Vol. 75 Issue 4, p942 

    Silicon-on-insulator (SOI) wafers are semiconductor substrates that can be used in next-generation high-speed and low-power devices. An ultrathin SOI wafer with a SOI layer of less than 20 nm is required for the dynamic random access memory half-pitch node of 100 nm or lower. In this report, the...

  • Seebeck Coefficient of Ge-on-Insulator Layers Fabricated by Direct Wafer Bonding Process. Veerappan Manimuthu; Shoma Yoshida; Yuhei Suzuki; Faiz Salleh; Mukannan Arivanandhan; Yoshinari Kamakura; Yasuhiro Hayakawa; Hiroya Ikeda // Advanced Materials Research;2015, Vol. 1117, p94 

    We investigate thermoelectric characteristics of SiGe nanostructures for realizing highsensitive infrared photodetector applications. In this paper, for future Ge and SiGe nanowires, we fabricate p-type Ge-on-insulator (GOI) substrates by a direct wafer bonding process. We discuss the annealing...

  • Z-axis differential silicon-on-insulator resonant accelerometer with high sensitivity. Shang, Yanlong; Wang, Junbo; Tu, Sheng; Liu, Lei; Chen, Deyong // Micro & Nano Letters;Jul2011, Vol. 6 Issue 7, p519 

    The design, fabrication and testing of a z-axis micro-machined resonant accelerometer with differential detection fabricated by silicon-on-insulator (SOI) microelectromechanical system technology are reported. The sensor chip was developed by a silicon-direct-bonding SOI wafer (10+2+290 µm)....

  • Splendid isolation [silicon on insulator]. Dettmer, R. // Engineering & Technology (17509637);Apr2006, Vol. 1 Issue 1, p38 

    This paper discusses the growing popularity of silicon on insulator (SOI) technology in the semiconductor industry over the past few years. Of the total share of SOI wafer sales, a small percentage goes to SIMOX (separation by implanted oxygen) process while a large 80% goes to the rival...

  • Three-dimensional integration of silicon-on-insulator RF amplifier. Chen, C. L.; Chen, C. K.; Yost, D.-R.; Knecht, J. M.; Wyatt, P. W.; Burns, J. A.; Warner, K.; Gouker, P. M.; Healey, P.; Wheeler, B.; Keast, C. L. // Electronics Letters;6/5/2008, Vol. 44 Issue 12, p746 

    An RF amplifier implemented by wafer-scale three-dimensional integration of three completely fabricated silicon-on-insulator wafers is demonstrated. The MOSFETs are on the top and bottom tier with middle-tier matching circuits. Measured amplifier performance agrees well with simulation and the...

  • Crystalline quality of bonded silicon-on-insulator characterized by spectroscopic ellipsometry and Raman spectroscopy. Nguyen, N. V.; Maslar, J. E.; Kim, Jin-Yong; Han, Jin-Ping; Park, Jin-Won; Chandler-Horowitz, D.; Vogel, E. M. // Applied Physics Letters;10/4/2004, Vol. 85 Issue 14, p2765 

    The crystalline quality of silicon-on-insulator fabricated by a wafer bonding technique was examined by spectroscopic ellipsometry and Raman spectroscopy. The detailed modeling of the experimental ellipsometric data yields information about structural defects in the silicon-on-insulator layer....

  • Scattering loss in silicon-on-insulator rib waveguides fabricated by inductively coupled plasma reactive ion etching. Yongjin Wang; Zhilang Lin; Xinli Cheng; Changsheng Zhang; Fan Gao; Feng Zhang // Applied Physics Letters;11/1/2004, Vol. 85 Issue 18, p3995 

    Inductively coupled plasma reactive ion etching (ICPRIE) was used to etch rib the waveguide and U groove to achieve the integration of self-alignment connection between single mode fiber and rib waveguide in silicon-on-insulator (SOI) wafer. Interface roughness is one of the consequences of an...

  • Single-crystalline (100) Ge networks on insulators by rapid-melting growth along hexagonal mesh-pattern. Toko, Kaoru; Ohta, Yasuharu; Sakane, Takashi; Sadoh, Taizoh; Mizushima, Ichiro; Miyao, Masanobu // Applied Physics Letters;1/24/2011, Vol. 98 Issue 4, p042101 

    Single-crystalline-Ge (c-Ge) networks on insulator films formed on Si substrates are essential for integrating high-speed and multifunctional devices onto the Si-platform. Rapid-melting-growth of mesh-patterned amorphous-Ge is examined over large areas (500×250 μm2). For...

  • Hydrogen diffusion in silicon from plasma-enhanced chemical vapor deposited silicon nitride film at high temperature. Sheoran, Manav; Dong Seop Kim; Rohatgi, Ajeet; Dekkers, H. F. W.; Beaucarne, G.; Young, Matthew; Asher, Sally // Applied Physics Letters;4/28/2008, Vol. 92 Issue 17, p172107 

    The stable hydrogen isotope deuterium (D), which is released during the annealing of deuterated silicon nitride films, diffuses through the crystalline silicon and is captured by a thin, amorphous layer of silicon sputtered on the rear surface. We report on the measurement of the concentration...

Share

Read the Article

Courtesy of THE LIBRARY OF VIRGINIA

Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics