Intrinsic stress in narrow silicon metal-oxide-semiconductor field-effect transistors: Magnetotransport measurements

Paquin, N.; Pepper, M.; Gundlach, A.; Ruthven, A.
July 1988
Applied Physics Letters;7/18/1988, Vol. 53 Issue 3, p198
Academic Journal
Measurements of the Hall (ρxy) and transverse (ρxx) resistivities in narrow polycrystalline silicon-gated Si(100) field-effect transistors have been obtained. The measurements were carried out both with and without externally applied uniaxial stress. Analysis of the results suggests the presence of large compressive intrinsic edge stresses. A model based on device fabrication is developed to explain the presence of these edge stresses.


Related Articles

  • Simplify Power Designs with an Innovative MOSFET Package. Lee, Hawk; Jingen Qian; Norton, Kim // ECN: Electronic Component News;Apr2010, Vol. 54 Issue 4, p12 

    The article discusses the advancement in using the metal oxide semiconductor field-effect transistors (MOSFET) silicon technology and packaging which results to higher-performance devices.

  • MULTIPLE ADVANCES PROMOTE MOSFET PERFORMANCE. Morrison, David // Electronic Design;1/6/2003, Vol. 51 Issue 1, p90 

    Focuses on the innovations in power metal oxide semiconductor field-effect transistors (MOSFET). Progress made by semiconductor manufacturers in reducing the on-resistance and gate charge of silicon; Identification of the MOSFET package account for a sizable portion of the device's on-resistance.

  • Characterization of SiO2/SiC interface states and channel mobility from MOSFET characteristics including variable-range hopping at cryogenic temperature. Yoshioka, Hironori; Hirata, Kazuto // AIP Advances;Apr2018, Vol. 8 Issue 4, pN.PAG 

    The characteristics of SiC MOSFETs (drain current vs. gate voltage) were measured at 0.14−350 K and analyzed considering variable-range hopping conduction through interface states. The total interface state density was determined to be 5.4×1012 cm−2 from the additional shift in...

  • Quantum interference in ultrashort channel length silicon metal-oxide-semiconductor field-effect.... Hartstein, A. // Applied Physics Letters;10/14/1991, Vol. 59 Issue 16, p2028 

    Examines the quantum interference in ultrashort channel length silicon metal-oxide-semiconductor field-effect transistors. Presentation of the electrical conductance of the devices; Interpretation of the oscillations; Discussion on the production of metal-oxide-semiconductor field-effect...

  • Scaling the Si metal-oxide-semiconductor field-effect transistor into the 0.1-mum regime using.... Yan, R.H.; Ourmazd, A.; Lee, K.F.; Jeon, D.Y.; Rafferty, C.S.; Pinto, M.R. // Applied Physics Letters;12/16/1991, Vol. 59 Issue 25, p3315 

    Reports the conventional scaling of Si metal-oxide-semiconductor field-effect transistor into the deep submicron regime. Determination of the subthreshold characteristics by diffusion barrier height; Implication of the ground plane configuration; Implementation of the ground plane structure...

  • New properties and applications of electron-beam evaporated silicon in submicron elevated.... Mirabedini, Mohammad R.; Goodwin-Johansson, Scott H. // Applied Physics Letters;8/8/1994, Vol. 65 Issue 6, p728 

    Investigates the porous quality of the electron-beam evaporated silicon on metal-oxide-semiconductor field-effect transistor (MOSFET) gate spacers. Fabrication of submicron elevated source/drain MOSFET with ultrashallow junctions; Elimination of the selective deposition method; Advantage of the...

  • Substrate bias effect on the capture kinetics of random telegraph signals in submicron p-channel.... Simoen, E.; Claeys, C. // Applied Physics Letters;1/30/1995, Vol. 66 Issue 5, p598 

    Investigates the effect of substrate bias on the capture kinetics of random telegraph signals in submicron silicon p-channel metal-oxide semiconductor transistors. Study of interface-near oxide traps; Dependence of capture time constant on transverse electric field; Details on the carrier...

  • SiGe heterojunction vertical p-type metal-oxide-semiconductor field-effect transistors with Si cap. Chen, Xiangdong; Xiangdong Chen; Ouyang, Qiqing; Qiqing Ouyang; Onsongo, David M.; Onsongco, David M.; Jayanarayanan, Sankaran Kartik; Tasch, Al; Banerjee, Sanjay // Applied Physics Letters;9/11/2000, Vol. 77 Issue 11 

    SiGe source heterojunction p-type metal-oxide-semiconductor field-effect transistors (p-MOSFETs) have been used before to suppress the short channel effect for sub-100 nm devices. While the leakage is reduced, the drive current is also reduced due to the heterojunction. In this letter, we...

  • Fabrication of strained Si on an ultrathin SiGe-on-insulator virtual substrate with a high-Ge fraction. Tezuka, T.; Sugiyama, N.; Takagi, S. // Applied Physics Letters;9/17/2001, Vol. 79 Issue 12, p1798 

    A promising fabrication method for a Si[sub 1-x]Ge[sub x]-on-insulator (SGOI) virtual substrate and evaluation of strain in the Si layer on this SGOI substrate are presented. A 9-nm-thick SGOI layer with x=0.56 was formed by dry oxidation after epitaxial growth of Si[sub 0.92]Ge[sub 0.08] on a...

  • High intensity submillimeter photoresponse of a Si inversion layer. Verma, I. B.; Leung, M.; Drew, H. D.; Doezema, R. E.; Furneaux, J. E.; Wagner, R. J. // Applied Physics Letters;7/1/1985, Vol. 47 Issue 1, p57 

    The submillimeter wave (496, 385, and 66 μm) photoresponse has been measured in an n-channel Si metal-oxide-semiconductor field-effect transistor at 4.2 K. A fast (≤10 ns) response is observed only in the low carrier density (ns) regime where the dc conductance is activated. Nonlinear...


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics