Raman scattering study of low dose Si±-implanted GaAs used for metal-semiconductor field-effect transistor fabrication

Wagner, J.; Frey, Th.; Jantz, W.
December 1987
Applied Physics Letters;12/7/1987, Vol. 51 Issue 23, p1904
Academic Journal
The annealing of the lattice damage introduced by Si+ implantation into GaAs as well as the electrical activation of the dopant has been studied by Raman scattering. Implantation doses (4×1012–1×1013 cm-2) and annealing conditions (800–1040 °C for 5 s) were used which are typical for GaAs metal-semiconductor field-effect transistor fabrication. The normalized peak intensity of the longitudinal optical (LO) phonon-plasmon coupled mode is found to correlate with the sheet of conductivity, i.e., it probes the electrical activation. The lattice perfection, in contrast, is most sensitively measured by resonant 2LO-phonon scattering.


Related Articles

  • Beyond SILICON.  // Computer Shopper;Oct2015, Issue 332, p110 

    The article offers information on finding alternative to use of silicon in electronics in future. Topics discussed include benefits of indium gallium arsenide (InGaAs) over silicon by technology analyst Rob Willoner, silicon switch as the fundamental need of digital electronics like...

  • Depletion-mode GaAs metal-oxide-semiconductor field-effect transistor with amorphous silicon interface passivation layer and thin HfO2 gate oxide. Zhu, F.; Koveshnikov, S.; Ok, I.; Kim, H. S.; Zhang, M.; Lee, T.; Thareja, G.; Yu, L.; Lee, J. C.; Tsai, W.; Tokranov, V.; Yakimov, M.; Oktyabrsky, S. // Applied Physics Letters;7/23/2007, Vol. 91 Issue 4, p043507 

    The authors have demonstrated a n-type GaAs depletion-mode metal-oxide-semiconductor field-effect Transistor with normalized transconductance gm of 266 mS/mm, peak electron mobility of 1124 cm2 V-1 s-1, and low hysteresis. The good device characteristics are attributed to the use of amorphous...

  • Ultrathin body GaSb-on-insulator p-channel metal-oxide-semiconductor field-effect transistors on Si fabricated by direct wafer bonding. Masafumi Yokoyama; Haruki Yokoyama; Mitsuru Takenaka; Shinichi Takagi // Applied Physics Letters;2/16/2015, Vol. 106 Issue 8, p1 

    We have realized ultrathin body GaSb-on-insulator (GaSb-OI) on Si wafers by direct wafer bonding technology using atomic-layer deposition (ALD) Al2O3 and have demonstrated GaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) on Si. A 23-nm-thick GaSb-OI p-MOSFET...

  • Performance of a Double Gate Nanoscale MOSFET (DG-MOSFET) Based on Novel Channel Materials. Prasher, Rakesh; Dass, Devi; Vaid, Rakesh // Journal of Nano- & Electronic Physics;2013, Vol. 5 Issue 1, p01017-1 

    In this paper, we have studied a double gate nanoscale MOSFET for various channel materials using simulation approach. The device metrics considered at the nanometer scale are subthreshold swing (SS), drain induced barrier lowering (DIBL), on and off current, carrier injection velocity (vinj),...

  • Physics of strain effects in semiconductors and metal-oxide-semiconductor field-effect transistors. Sun, Y.; Thompson, S. E.; Nishida, T. // Journal of Applied Physics;5/15/2007, Vol. 101 Issue 10, p104503 

    A detailed theoretical picture is given for the physics of strain effects in bulk semiconductors and surface Si, Ge, and III–V channel metal-oxide-semiconductor field-effect transistors. For the technologically important in-plane biaxial and longitudinal uniaxial stress, changes in energy...

  • Integration of a resonant-tunneling structure with a metal-semiconductor field-effect transistor. Woodward, T. K.; McGill, T. C.; Chung, H. F.; Burnham, R. D. // Applied Physics Letters;11/9/1987, Vol. 51 Issue 19, p1542 

    We report experimental realization of a three-terminal negative differential resistance (NDR) device. The device consists of a GaAs-AlxGa1-xAs double-barrier tunneling heterostructure in series with a recessed-gate metal-semiconductor field-effect transistor on a semi-insulating substrate. Basic...

  • Al[sub x]Ga[sub 1-x]As-GaAs metal-oxide semiconductor field effect transistors formed by lateral.... Chen, E.I.; Holonyak Jr., N. // Applied Physics Letters;5/15/1995, Vol. 66 Issue 20, p2688 

    Demonstrates a gallium arsenide-based metal-oxide semiconductor field effect transistor employing a laterally formed native oxide of aluminum arsenide. Similarities with semiconductor laser devices; Exhibition of gate leakage current; Penetration of native oxide by the gate electric field.

  • Simplify Power Designs with an Innovative MOSFET Package. Lee, Hawk; Jingen Qian; Norton, Kim // ECN: Electronic Component News;Apr2010, Vol. 54 Issue 4, p12 

    The article discusses the advancement in using the metal oxide semiconductor field-effect transistors (MOSFET) silicon technology and packaging which results to higher-performance devices.

  • MULTIPLE ADVANCES PROMOTE MOSFET PERFORMANCE. Morrison, David // Electronic Design;1/6/2003, Vol. 51 Issue 1, p90 

    Focuses on the innovations in power metal oxide semiconductor field-effect transistors (MOSFET). Progress made by semiconductor manufacturers in reducing the on-resistance and gate charge of silicon; Identification of the MOSFET package account for a sizable portion of the device's on-resistance.


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics