TITLE

Rapid thermal anneal induced effects in polycrystalline silicon gate structures

AUTHOR(S)
Kamgar, Avid; Hillenius, S. J.
PUB. DATE
October 1987
SOURCE
Applied Physics Letters;10/19/1987, Vol. 51 Issue 16, p1251
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
Effects of dynamic temperature nonuniformities during rapid thermal anneal (RTA) cycles of layered structures have been investigated. Silicon gate capacitors (4000 Å, As doped, polycrystalline Si on 175 Å thermal oxide) were subjected to temperatures 450–1200 °C using incoherent radiation from W lamps. Capacitance-voltage measurements before and after RTA showed that due to RTA, interface traps were generated at temperatures as low as 600 °C, but that they were passivated by a standard post-metallization anneal. High-temperature RTA induced, in addition, a residual flatband voltage shift which was not removed by hydrogen anneal. The residual shift can be due to either a change in oxide fixed charges or changes in the characteristics of the polycrystalline Si gate. Faster temperature ramp rates increased the generation of interface traps confirming the dynamic nature of stress, but did not affect the residual shift.
ACCESSION #
9824580

 

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