Improved quality Si-on-Si3N4 structures by ion beam synthesis and lamp annealing

Reeson, K. J.; Hemment, P. L. F.; Meekison, C. D.; Booker, G. R.; Kilner, J. A.; Chater, R. J.; Davis, J. R.; Celler, G. K.
June 1987
Applied Physics Letters;6/29/1987, Vol. 50 Issue 26, p1882
Academic Journal
Silicon wafers were implanted with 200 keV 14N+ ions to a dose of 0.95×1018 14N+ cm-2 at a temperature of 520 °C. These wafers were then annealed at 1405 °C for 30 min, a temperature significantly higher than that normally used (1200 °C) for annealing buried nitride, silicon-on-insulator (SOI) structures. Annealing leads to the formation of a well defined layer of essentially single-crystal Si3N4 containing a few low angle grain boundaries. The Si/Si3N4 interfaces are abrupt, the lower one being almost planar while the upper one shows some irregularities due to fingerlike protrusions of Si3N4 and has an associated region of defective silicon. The silicon overlay is single crystal with no resolvable defects making the wafers good candidates for SOI substrates.


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