Design of 8-Bit Current Mode Segmented DAC

Saravanan, T.; Saritha, G.; Srinivasan, V.
February 2014
Middle East Journal of Scientific Research;2/23/2014, Vol. 20 Issue 12, p1963
Academic Journal
The paper proposes a current mode Digital to Analog Converter (DAC) which is implemented with segmented architecture. The DAC is designed to achieve low power dissipation, high speed and 8 bit resolution. The DAC uses current switching to improve the speed. The design takes the advantage of Thermometer code DACs to achieve monotonicity and reduce glitch energy. The digital input is parted into two segments: the MSB segment and the LSB segment. The DAC uses the Thermometer code DAC for the MSB segment of 3 bits and R2R Ladder DAC for the LSB segment of the remaining 5 bits. The R2R Ladder DAC is composed of an R2R Ladder network that performs as a current divider. The Thermometer coded DAC is composed of a binary to thermometer decoder with 2N current sources of each connected with a switch controlled by the corresponding bit of the thermometer code. The analog outputs of these sub DACs are summed to give the total analog output of the segmented 8 bit DAC. The DAC is operated with ± 2.5 V power supply. The proposed DAC achieves low differential nonlinearity (DNL) < ±0.5LSB, low integral nonlinearity (INL) < ±0.5LSB, conversion rate of 20M samples/sec and low glitch energy. The DAC is implemented on Tanner tool with 2μ process.


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