TITLE

Design of 8-Bit Current Mode Segmented DAC

AUTHOR(S)
Saravanan, T.; Saritha, G.; Srinivasan, V.
PUB. DATE
February 2014
SOURCE
Middle East Journal of Scientific Research;2/23/2014, Vol. 20 Issue 12, p1963
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
The paper proposes a current mode Digital to Analog Converter (DAC) which is implemented with segmented architecture. The DAC is designed to achieve low power dissipation, high speed and 8 bit resolution. The DAC uses current switching to improve the speed. The design takes the advantage of Thermometer code DACs to achieve monotonicity and reduce glitch energy. The digital input is parted into two segments: the MSB segment and the LSB segment. The DAC uses the Thermometer code DAC for the MSB segment of 3 bits and R2R Ladder DAC for the LSB segment of the remaining 5 bits. The R2R Ladder DAC is composed of an R2R Ladder network that performs as a current divider. The Thermometer coded DAC is composed of a binary to thermometer decoder with 2N current sources of each connected with a switch controlled by the corresponding bit of the thermometer code. The analog outputs of these sub DACs are summed to give the total analog output of the segmented 8 bit DAC. The DAC is operated with ± 2.5 V power supply. The proposed DAC achieves low differential nonlinearity (DNL) < ±0.5LSB, low integral nonlinearity (INL) < ±0.5LSB, conversion rate of 20M samples/sec and low glitch energy. The DAC is implemented on Tanner tool with 2μ process.
ACCESSION #
97804453

 

Related Articles

  • Design and Realization of Pruning Recursive FFT Algorithm in read/write Channel of Servo Burst Signal. Hong Ding; Qingdong Wang // Proceedings of the International Symposium on Information System;2009, p211 

    In order to calculate the serve position error signal ( PES) in the serve system, it is necessary to make high definition sampling and FFT calculation for the burst signal. Based on the reference, for reducing cost purpose, most designers adopt 6-digit ADC convector in the read/write channel...

  • Differential Gain Stage Is Suitable For Direct IF Downconversion. Hendriks, Paul // Electronic Design;01/25/99, Vol. 47 Issue 2, p14 

    Discusses the application of differential gain stage in direct-intermediate frequency (IF) downconversion, which involves sampling of IF signals above an analog-to-digital converter's (ADC) baseband region. Selection of IF frequency and sample rate of the ADC; Input impedance of ADC; Noise...

  • Serial A/D converters offer high speed in small packages. Schweber, Bill; Granville, Fran // EDN;3/1/96, Vol. 41 Issue 5, p32 

    Reports on the availability of two analog-to-digital converters from Signal Processing Technologies Inc. Specifications; Features; System compatibility; Price; Contact number.

  • Making it easier to interface ADCs to host processors. Wegner, Rich // Electronic Design;1/8/96, Vol. 44 Issue 1, p68 

    Reports that the simplification of the interfacing of the analog-to-digital converter (ADC) along with its host processor or digital signal processor (DSP) is a common trend for general-purpose, industrial and instrumentation ADCs. Features of the 12-bit ADCs; Discussion of the single-chip...

  • LOW OR HIGH END, ADCs ARE UNDER PRESSURE TO PERFORM. Maniwa, Tets // Electronic Design;1/6/2003, Vol. 51 Issue 1, p58 

    Identifies the concepts of analog-digital converter. Performance of signal processing in the digital domain; Indication of the bypass capacitors in integrated circuit packages; Expansion of converter product portfolio.

  • Analog-to-digital converters sample fast.  // Control Engineering;Mid-Mar98, Vol. 45 Issue 4, p24 

    Presents information on SPT7870 and SPT7871, two analog-to-digital converters developed by the SPT company. Features and performance of the converters.

  • Optics circumvent bottleneck in A/D conversion. Jones-Bey, Hassaun // Laser Focus World;Jan99, Vol. 35 Issue 1, p37 

    Reports on the optical way of speeding up the analog-to-digital (A/D) conversion process that limits the use of digital-signal-processing capacity for high-performance communication and radar system. Approaches in making the conversion process; Comments from Bahram Jalali, principal...

  • High speed signal averager for characterizing periodic signals in the time domain. Hair, Dennis W.; Niertit, Frank J.; Hodgson, Donald F.; Amis, Eric J. // Review of Scientific Instruments;Aug1989, Vol. 60 Issue 8, p2780 

    A new data-acquisition and averaging system is described which rapidly digitizes and averages periodic signals of known frequency. Each acquisition channel has a programmable gain input amplifier, track and hold amplifier, 12 bit analog to digital converter, 4K by 32 bit memory buffer, and an...

  • Delta-sigma converter allows more integrated functionality. Baker, Bonnie C. // Electronic News;08/18/97, Vol. 43 Issue 2181, p56 

    Details how the delta-sigma analog/digital (A/D) converter addresses circuit designers' problems associated with measuring small signals such as temperature from sensors. Limited enhancements of the A/D converter usually used in the systems; Delta-sigma converters' analog and digital...

Share

Read the Article

Courtesy of THE LIBRARY OF VIRGINIA

Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics