High-Resolution 12-Bit Segmented Capacitor DAC in Successive Approximation ADC

Wee Leong Son; Abdul Majid, Hasmayadi; Musa, Rohana
December 2012
World Academy of Science, Engineering & Technology;2012, Issue 72, p421
Academic Journal
This paper study the segmented split capacitor Digital-to-Analog Converter (DAC) implemented in a differentialtype 12-bit Successive Approximation Analog-to-Digital Converter (SA-ADC). The series capacitance split array method employed as it reduced the total area of the capacitors required for high resolution DACs. A 12-bit regular binary array structure requires 2049 unit capacitors (Cs) while the split array needs 127 unit Cs. These results in the reduction of the total capacitance and power consumption of the series split array architectures as to regular binary-weighted structures. The paper will show the 12-bit DAC series split capacitor with 4-bit thermometer coded DAC architectures as well as the simulation and measured results.


Related Articles

  • Create a DAC from a microcontroller's ADC. Antonyan, Vardan // EDN Europe;Jan2010, Vol. 57 Issue 1, p5 

    The article presents information on using a microcontroller's analog-to-digital converter (ADC) channel and a general-purpose input/output (GPIO) to create a digital-to-analog converter (DAC). It is said that a DAC can be created by charging a capacitor and using a...

  • A 10-bit, 200MS/s CMOS Pipeline ADC using new shared opamp architecture. Ghaedrahmati, Hanie; Hajsadeghi, Khosrow // International Journal of VLSI Design & Communication Systems;Dec2012, Vol. 3 Issue 6, p1 

    A 10 bit opamp-sharing pipeline analog-to-digital converter (ADC) using a novel mirror telescopic operational amplifiers (opamp) with dual nmos differential inputs is presented. Reduction of power and area is achieved by completely merging the front-end sample-and-hold amplifier (SHA) into the...

  • Charge-dumping switching scheme for successive-approximation-register analogue-to-digital converters. Shiuh-hua Wood Chiang // Electronics Letters;3/3/2016, Vol. 52 Issue 5, p348 

    A 'charge-dumping' digital-to-analogue converter (DAC) switching scheme is proposed for successive-approximation-register analogueto-digital converters. The proposed switching scheme utilises switched current sources to shift DAC voltages without consuming any power. The proposed scheme reduces...

  • Area efficient non-fractional binary-weighted split-capacitive-array DAC for successive-approximation-register ADC. Mao, W.; Li, Y.; Heng, C. H.; Lian, Y. // Electronics Letters;3/30/2017, Vol. 53 Issue 7, p452 

    An area efficient non-fractional binary-weighted capacitive-array with attenuation capacitor (NFBWA) digital-to-analogue converter (DAC) is presented for successive-approximation-register ADC. Based on linearity and matching requirement, the segmentation degrees (i.e. the number of bits in each...

  • A 105 dB DR, -101 dB THD+N Sigma-Delta Audio D/A Converter with A Noise-shaping Dynamic Element Matching Technique. Feng Hui; Yu Zeqi // Journal of Computers;Feb2010, Vol. 5 Issue 2, p194 

    Sigma-Delta audio digital-to-analog (D/A) converter with a noise-shaping dynamic element matching (NSDEM) technique is presented. The proposed NSDEM technique has the advantage of less computation and also can be implemented with all-digital circuits easily. The converter is fabricated in a 0.35...

  • 12 b 50 MS/s 0.18 μm CMOS SAR ADC based on highly linear C-R hybrid DAC. Park, J.-S.; Kim, D.-H.; An, T.-J.; Kim, M.-K.; Ahn, G.-C.; Lee, S.-H. // Electronics Letters;2/6/2020, Vol. 56 Issue 3, p119 

    12 b 50 MS/s successive-approximation register (SAR) ADC with a highly linear C-R hybrid DAC is presented. The proposed DAC significantly reduces the required total number of unit capacitors by processing the upper bits based on a binary-weighted capacitor array and the remaining lower bits...

  • DACs, ADCs increase speed and resolution, cut power. Schweber, Bill; Granville, Fran // EDN;10/10/96, Vol. 41 Issue 21, p24 

    Introduces various analog-to-digital converters (ADC) and digital-to-analog converters (DAC). Signal Processing Technologies Inc.'s SPT9712 and SPT9713 high-speed DACs; Analog Devices Inc.'s AD9057 and AD9059 ADCs; Philips Semiconductors' TDA8762A and TDA8763A ADCs.

  • A grounding philosophy for mixed-signal systems. Kester, Walt // Electronic Design;06/23/97 Supplement, Vol. 45 Issue 13, p29 

    Presents information on the use of mixed-signal devices. What signal-processing systems require; Reference to the mixed-signal devices analog-to-digital converters (ADCs) and digital-to-analog converters (DACs); How sampling ADCs with internal sample-and-hold circuits operate.

  • Basic Block of Pipelined ADC Design Requirements.  // Radioengineering;Apr2011, Vol. 20 Issue 1, p234 

    No abstract available.


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics