TITLE

Design of A high performance low-power consumption discrete time Second order Sigma-Delta modulator used for Analog to Digital Converter

AUTHOR(S)
LAAJIMI, Radwene; MASMOUDI, Mohamed
PUB. DATE
November 2012
SOURCE
International Journal of Advanced Computer Science & Application;Nov2012, Vol. 3 Issue 11, p108
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
This paper presents the design and simulations results of a switched-capacitor discrete time Second order Sigma-Delta modulator used for a resolution of 14 bits Sigma-Delta analog to digital converter. The use of operational amplifier is necessary for low power consumption, it is designed to provide large bandwidth and moderate DC gain. With 0.35µm CMOS technology, the ΣΔ modulator achieves 86 dB dynamic range, and 85 dB signal to noise ratio (SNR) over an 80 KHz signal bandwidth with an oversampling ratio (OSR) of 88, while dissipating 9.8mW at ±1.5V supply voltage.
ACCESSION #
88271659

 

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