TITLE

OPTIMIZATION OF FINGER SPACING IN PHOTOVOLTAIC MODULES FOR MINIMUM POWER LOSS

AUTHOR(S)
Kumar, E. Suresh; Sarkar, Bijan
PUB. DATE
February 2013
SOURCE
Asian Journal of Computer Science & Information Technology;Feb2013, Vol. 3 Issue 2, p13
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
The metallization grid pattern is one of the most important design elements for high-efficiency solar cells. The sum of the power losses can be minimized to produce an optimized grid-pattern design for a cell with specific parameters. The model is a standard polycrystalline silicon solar cell, and areas for efficiency improvements are identified, namely, a reduction in emitter finger widths and a shift toward series-interconnected, high-voltage modules with very small cell sizes. Using the model to optimize future grid-pattern designs, higher cell and module efficiencies of such devices can be achieved. One way to reduce the resistance is to increase the grid coverage, but at the expense of blocking light from the cell. An optimum grid-line pattern minimizes the combined effect of the four loss mechanisms directly associated with the grid which are , the emitter-layer resistance, the grid-metal resistance, the shading loss due to grid reflection, and the contact resistance between the metal and the semiconductor. This paper is an insight into the finger spacing and how it affects and cause the power loss mechanism in the photovoltaic cell. The equations for resistive losses were combined to determine the total power loss in the top contact grid. An online graphical simulation tool from the photovoltaic education network PVCDROM is used to adjust the various parameters to determine the total power loss. The analysis quantifies the total and fractional power losses of the metallization of poly-Si solar cells is presented. By numerically minimizing the sum of the fractional power losses present in a metallization scheme, the optimal grid-pattern can be determined. The importance of reducing both the finger width and total cell size is paramount, and these are two areas where further research and optimization are expected to lead to increased efficiencies of poly-Si devices
ACCESSION #
88033047

 

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