Single-crystalline Si on insulator in confined structures fabricated by two-step metal-induced crystallization of amorphous Si

Liu, Yaocheng; Deal, Michael D.; Saraswat, Krishna C.; Plummer, James D.
December 2002
Applied Physics Letters;12/9/2002, Vol. 81 Issue 24, p4634
Academic Journal
We present a technology and its mechanism to obtain single-crystalline Si pillars on SiO[sub 2] using a two-step Ni-induced crystallization process on amorphous Si pillars with confined sizes. The amorphous Si pillars with a Ni cap were first annealed at 400 °C for 15 h so that a single-crystalline NiSi[sub 2] template was formed on top of each pillar. In the second step, they were annealed at 550 °C for 2 h, during which single-crystalline Si pillars were formed by NiSi[sub 2]-mediated solid-phase epitaxy. These single-crystalline Si pillars can be used for advanced vertical metal-oxidesemiconductor transistors and surround-gate structures, especially where low-temperature processing is required.


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