TITLE

Improved extraction of carrier concentration and depletion width from capacitance–voltage characteristics of silicon n[sup +]–p-well junction diodes

AUTHOR(S)
Poyai, A.; Claeys, C.; Simo&dBreve;en, E.
PUB. DATE
February 2002
SOURCE
Applied Physics Letters;2/18/2002, Vol. 80 Issue 7, p1192
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
An accurate method is proposed for the extraction of the carrier concentration profile (P[SUB p well]) and the depletion width (W[SUB p well]) in a p-well region from high-frequency capacitance measurements by accounting for the series resistance and the capacitance of the n[SUP +] region. W[SUB p well] was calculated from the capacitance in the p-well region (C[SUB p well]), while P[SUB p well] was derived from the slope of the plot 1/C[SUP 2,SUB p well] versus reverse bias. The P[SUB p well] extracted was compared with profiles obtained from spreading resistance probe results. The differences between the two techniques are within 15% in the accessible depletion width, which will be discussed in view of the depth resolution anticipated.
ACCESSION #
6112370

 

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