TITLE

Effect of Si lattice strain on the reliability characteristics of ultrathin SiO[sub 2] on a 4° tilted wafer

AUTHOR(S)
Chang, Hyo Sik; Choi, Sangmu; Yang, Hyundoek; Min, Kyung-youl; Moon, Dae Won; Lee, Hyung-Ik; Hwang, Hyunsang
PUB. DATE
January 2002
SOURCE
Applied Physics Letters;1/21/2002, Vol. 80 Issue 3, p386
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
The electrical and structural characteristics of an ultrathin gate dielectric, thermally grown on 4° tilted wafer has been investigated. Compared with a control wafer, a relaxation of the Si lattice strain at the SiO[sub 2]/Si(001) interface was observed for the 4° tilted wafer, which was confirmed by medium energy ion scattering spectroscopy. A significant improvement in the reliability characteristics of a metal–oxide–semiconductor (MOS) capacitor, with a 2.5-nm-thick gate oxide, grown on a tilt wafer was observed. This improvement in reliability can be explained by the relaxation of strain at the SiO[sub 2]/Si interface. An ultrathin gate dielectric grown on a tilt wafer represents a promising alternative for gate dielectric applications in future MOS devices. © 2002 American Institute of Physics.
ACCESSION #
5884258

 

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