TITLE

Electrical characteristics of a TaO[sub x]N[sub y]/ZrSi[sub x]O[sub y] stack gate dielectric for metal–oxide–semiconductor device applications

AUTHOR(S)
Jung, Hyungsuk; Yang, Hyundoek; Im, Kiju; Hwang, Hyunsang
PUB. DATE
December 2001
SOURCE
Applied Physics Letters;12/24/2001, Vol. 79 Issue 26, p4408
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
In this letter, we describe a process for the preparation of high-quality tantalum oxynitride (TaO[sub x]N[sub y]) with zirconium silicate (ZrSi[sub x]O[sub y]) as an interfacial layer for use in gate dielectric applications. Compared with conventional chemical oxide and nitride as interfacial layers, TaO[sub x]N[sub y] metal–oxide–semiconductor capacitors using ZrSi[sub x]O[sub y] as an interfacial layer exhibit lower leakage current levels at the same oxide thickness and a lower interface state density. We were able to confirm the TaO[sub x]N[sub y]/ZrSi[sub x]O[sub y] stack structure by Auger electron spectroscopy and transmission electron microscopy analyses. Zirconium silicate is a promising interfacial layer for future high-k gate dielectric applications. © 2001 American Institute of Physics.
ACCESSION #
5742021

 

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