High-frequency capacitance–voltage measurement of plasma-enhanced chemical-vapor-deposition-grown SiO[sub 2]/n-GaN metal-insulator-semiconductor structures

Chen, P.; Wang, W.; Chua, S. J.; Zheng, Y. D.
November 2001
Applied Physics Letters;11/19/2001, Vol. 79 Issue 21, p3530
Academic Journal
This work reports on the high-frequency capacitance–voltage (C–V) measurements of metal-insulator-semiconductor structures fabricated by depositing SiO[sub 2] film on an n-type GaN epitaxial layer. The SiO[sub 2] film was grown by plasma-enhanced chemical vapor deposition at 310 °C, and the GaN layer was grown by low-pressure metalorganic chemical vapor deposition on a sapphire substrate. High-frequency C–V measurements have been carried out in darkness with different bias ranges and sweep rates. With a bias between ±20 V, the small flatband shift and the very small hysteresis indicate that the interface trap concentration in the sample is low, and the interface state density is 2.1×10[sup 11] eV[sup -1] cm[sup -2]. However, a pronounced increase of hysteresis with an extended bias range was observed. When the bias is over ±50 V, the increase of the hysteresis is much larger, indicating the nonuniform distribution of different slow deep states in the structure. The extracted interface state density is in the range of 10[sup 12] eV[sup -1] cm[sup -2]. © 2001 American Institute of Physics.


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