Interface defect-assisted single electron charging (and discharging) dynamics in Ge nanocrystals memories

de Sousa, J. S.; Peibst, R.; Farias, G. A.; Leburton, J.-P.; Hofmann, K. R.
July 2010
Applied Physics Letters;7/5/2010, Vol. 97 Issue 1, p013504
Academic Journal
The charging and discharging dynamics of Ge nanocrystal memories is measured and compared with a realistic quantum mechanical model that is able to reproduce qualitatively the overall device behavior. Quantitatively, the charging (discharging) dynamics is faster (slower) than predicted by calculations. To explain the discrepancies, we propose the quantum confined nanocrystal states are responsible for collecting the incoming electrons, but some of them are captured by defects in the nanocrystal surface. The potential created by the filled defects modify the spatial distribution of the nanocrystal wave functions, enhancing their penetration in the tunneling oxide and increasing the incoming transition rates. In the discharging process, the electrons confined in the nanocrystal states escape initially, while the ones in the defects have to be thermally excited to the nanocrystals states in order to tunnel out, slowing down the escape of the last few electrons.


Related Articles

  • Protein guides nanocrystal self-assembly for flash memory floating gates.  // Solid State Technology;Mar2006, Vol. 49 Issue 3, p22 

    The article discusses on the experiment conducted on the use of protein as a replacement for nanocrystal in formulating flash memory floating cell. Chaperonin protein lattice can be formulated into a crystal lattice on a silicon surface by a non-covalent interactions. Fabrication of the flash...

  • Comparison of electron and hole charge-discharge dynamics in germanium nanocrystal flash memories. Akca, Imran B.; D├óna, Aykutlu; Aydinli, Atilla; Turan, Rasit // Applied Physics Letters;2/4/2008, Vol. 92 Issue 5, p052103 

    Electron and hole charge and discharge dynamics are studied on plasma enhanced chemical vapor deposition grown metal-oxide-silicon germanium nanocrystal flash memory devices. Electron and hole charge and discharge currents are observed to differ significantly and depend on annealing conditions...

  • Multilayer Ge nanocrystals embedded within Al2O3 matrix for high performance floating gate memory devices. Bar, R.; Aluguri, R.; Manna, S.; Ghosh, A.; Satyam, P. V.; Ray, S. K. // Applied Physics Letters;8/31/2015, Vol. 107 Issue 9, p1 

    Metal-insulator-silicon devices with Ge nanocrystals dispersed in Al2O3 have been studied with a view to exploit them for floating gate memory applications. Multilayer devices comprising of five layers Ge nanocrystals have exhibited superior memory characteristics over the single layer Ge and...

  • Recent Patents in Semiconductor Nanocluster Floating Gate Flash Memory. Dai, Jiyan Y.; Pui-Fai Lee // Recent Patents on Nanotechnology;Jun2007, Vol. 1 Issue 2, p97 

    Nanoclusters (NC) as charge storage nodes have been applied in nonvolatile, high-speed, high-density and low-power memory devices. Compared with conventional floating gate memory, where a layer of poly-Si is used for charge storage, a memory device composed of nanoclusters isolated by...

  • Delegates eye successor to floating gate flash memory. Manners, David // Electronics Weekly;2/25/2004, Issue 2135, p4 

    The successor to floating gate technology for flash memory was debated last week at the International Solid State Circuits Conference. Ki-Nam Kim, v-p of Samsung's memory division, is going for the chalcogenide-based approach which relies on a phase change effect in a material to make a switch....

  • Hybrid polarity and carrier injection of gold and gadolinium oxide bi-nanocrystals structure. Wang, Jer-Chyi; Lin, Chih-Ting; Huang, Po-Wei; Lai, Chao-Sung; Chang, Li-Chun; Wu, Chih-I; Chang, Jung-Hung // Applied Physics Letters;2/25/2013, Vol. 102 Issue 8, p083507 

    In this study, the carrier injection mechanism of gold and gadolinium oxide bi-nanocrystals (BNCs) with hafnium dioxide NC separation layer was investigated. Further, an N-shaped carrier injection curve was observed under positive gate bias. It is resulted from the hybrid polarity and carrier...

  • New flash architecture simplifies system design. Grundmann // Wireless Design & Development;Aug99, Vol. 7 Issue 9, p31 

    Presents a flash architecture which helps simplify system design and reduce real-estate by storing both code and data in a single flash memory component. Attributes of linear flash memory which make it ideal for storing firmware as well as a good choice for storing nonvolatile data; Advantage...

  • Flash and EEPROM storage boost 8-bit MCU flexibility. Bursky, Dave // Electronic Design;03/08/99, Vol. 47 Issue 5, p73 

    Focuses on the integration of flash memory into microcontrollers and embedded processors design. Advantages of flash memory in the electronic design; Versions of processors or application specific integrated circuits with DSP cores; Function of electrically erasable programmable ROM;...

  • 8- and 16-bit microcontrollers serve up low cost, high performance. Bursky // Electronic Design;10/04/99, Vol. 47 Issue 20, p45 

    Focuses on suppliers' enhancement of 8- and 16-bit microcontrollers. Broad range of applications; Use of high-density flash memory; One-time programming devices; Combination of high performance and low power.


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics