Low-temperature formation of silicon nitride gate dielectrics by atomic-layer deposition

Nakajima, Anri; Yoshimoto, Takashi; Kidera, Toshirou; Yokoyama, Shin
July 2001
Applied Physics Letters;7/30/2001, Vol. 79 Issue 5
Academic Journal
Thin (equivalent oxide thickness T[sub eq] of 2.4 nm) silicon nitride layers were deposited on Si substrates by an atomic-layer-deposition (ALD) technique at low temperatures (<550 °C). The interface state density at the ALD silicon nitride/Si-substrate interface was almost the same as that of the gate SiO[sub 2]. No hysteresis was observed in the gate capacitance–gate voltage characteristics. The gate leakage current was the level comparable with that through SiO[sub 2] of the same T[sub eq]. The conduction mechanism of the leakage current was investigated and was found to be the direct tunneling. The ALD technique allows us to fabricate an extremely thin, very uniform silicon nitride layer with atomic-scale control for the near-future gate dielectrics. © 2001 American Institute of Physics.


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