Integration of self-assembled diblock copolymers for semiconductor capacitor fabrication

Black, C. T.; Guarini, K. W.; Milkove, K. R.; Baker, S. M.; Russell, T. P.; Tuominen, M. T.
July 2001
Applied Physics Letters;7/16/2001, Vol. 79 Issue 3
Academic Journal
We combine a self-organizing diblock copolymer system with semiconductor processing to produce silicon capacitors with increased charge storage capacity over planar structures. Our process uses a diblock copolymer thin film as a mask for dry etching to roughen a silicon surface on a 30 nm length scale, which is well below photolithographic resolution limits. Electron microscopy correlates measured capacitance values with silicon etch depth, and the data agree well with a geometric estimate. This block copolymer nanotemplating process is compatible with standard semiconductor processing techniques and is scalable to large wafer dimensions. © 2001 American Institute of Physics.


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