Lamb wave devices using capacitive micromachined ultrasonic transducers

Yaralioglu, G. G.; Badi, M. H.; Ergun, A. S.; Cheng, C. H.; Khuri-Yakub, B. T.; Degertekin, F. L.
January 2001
Applied Physics Letters;1/1/2001, Vol. 78 Issue 1, p111
Academic Journal
Lamb wave devices based on capacitive micromachined ultrasonic transducers (CMUTs) have been built on 500-μm-thick silicon wafers for frequencies in the vicinity of 1 MHz. CMUTs have been used to both excite and detect Lamb waves in the substrate. This configuration eliminates the need for piezoelectric materials, which are not compatible with the existing integrated circuit (IC) fabrication techniques, and allows easy integration of Lamb wave devices and electronics on the same wafer. Finite element analysis of the devices shows that the lowest order antisymmetric Lamb wave (A[sub 0]) is the dominant mode in the substrate in this frequency range. This result is also confirmed by demonstration experiments. © 2001 American Institute of Physics.


Related Articles

  • Fab Followers? Not Anymore. Moore, Wayne // Electronic News;11/13/2000, Vol. 46 Issue 46, p58 

    Deals with the changes in semiconductor wafer plants of the integrated circuit packaging industry. Description of a semiconductor wafer plant; Comment on people working in a semiconductor wafer plant.

  • Thin is in: Wafer-thinning method delivers ultra-slim chips with a clean process. Bursky // Electronic Design;09/07/99, Vol. 47 Issue 18, p27 

    Focuses on wafer-thinning method that delivers ultra-slim integrated circuits. Tru-Sci Technology Inc.'s Tru-Etch scheme; Use of airflow techniques; Decomposition of injected reactant gases.

  • Laser wafer marking tracks IC production. Wallace, John // Laser Focus World;Feb99, Vol. 35 Issue 2, p75 

    Provides information on the significance of laser wafer marking on semiconductor integrated chips (IC) production. Description of a typical wafer-marking system; Capabilities of the laser wafer marking; Improvements and developments in IC makers.

  • Identification and cleaning effect of active intermediates in the O3/ultraviolet ray/supersonic wave multiple reaction using a low-temperature sprayed TiO2 photocatalyst. Seiichi Ishikawa; Sen Li; Chen Huang; Teiji Tanizaki; Wenhao Zhang; Tomohiko Higuchi; Hisato Haraga // Sustainable Environment Research;2015, Vol. 25 Issue 6, p323 

    Water for cleaning wafers intended for integrated circuit (IC) fabrication was produced using a combination of ozone (O3), ultra-violet ray (UVR), super-sonic wave (SSW) and a TiO2 photocatalyst deposited on quartz glass by low-temperature spraying. Using both UVR and SSW led to a decrease in...

  • Fabrication and Characterization of Capacitive Micromachined Ultrasonic Transducers with Low-TemperatureWafer Direct Bonding. Xiaoqing Wang; Yude Yu; Jin Ning // Micromachines;Dec2016, Vol. 7 Issue 12, p1 

    This paper presents a fabrication method of capacitive micromachined ultrasonic transducers (CMUTs) by wafer direct bonding, which utilizes both the wet chemical and O2 plasma activation processes to decrease the bonding temperature to 400 °C. Two key surface properties, the contact angle and...

  • Contactless optical evaluation of processing effects on carrier lifetime in silicon. Baude, P. F.; Tamagawa, T.; Polla, D. L. // Applied Physics Letters;12/10/1990, Vol. 57 Issue 24, p2579 

    Contactless, optical modulation of free-carrier absorption has been used to identify minority-carrier lifetime degradation associated with both novel and common very large scale integrated circuit processing steps in p-type silicon wafers. Carrier lifetime degradation and a corresponding...

  • 300mm tool ramp on track, says Applied's Maydan.  // Solid State Technology;Sep2002, Vol. 45 Issue 9, p20 

    Reports on the transition from 200 to 300mm semiconductor wafer fabrication to cover high developmental costs. Problems encountered in the transition; Shrinking depth-of-focus latitude in lithography; Management of fabrication lines using software; Consumerization of the chip industry; Impact...

  • Understanding and controlling wafer charging damage. Lukaszek, Wes // Solid State Technology;Jun98, Vol. 41 Issue 6, p101 

    Discusses wafer charging damage, a problem in integrated circuit manufacturing. Misconception on the cause of the device damage; How to predict device damage; Possible solutions to the problem. INSET: How CHARM-2 quantifies wafer charging.

  • European technologists to combine Cu/low-k and packaging. Burggraaf, Pieter // Solid State Technology;Dec2001, Vol. 44 Issue 12, p28 

    Reports that research and development center IMEC in Leuven has begun to develop an integrated semiconductor wafer level packaging on copper low-k integrated circuit interconnect. Advantages of the packaging technology; Technique used by the center to prevent the weakness and corrosion...


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics