TITLE

Chip CHALLENGES

AUTHOR(S)
Bartholomew, Doug
PUB. DATE
September 2000
SOURCE
Industry Week/IW;09/18/2000, Vol. 249 Issue 15, p33
SOURCE TYPE
Trade Publication
DOC. TYPE
Article
ABSTRACT
Focuses on the implementation of multiple process and material enhancement in making semiconductors. Advantages of copper interconnects; Information on the technique of IBM for building chips with low-capacitance dielectric; Advantage of 300-mm wafer format; Implications of the industry's move to 0.13-micron lithography.
ACCESSION #
3583426

 

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