TITLE

High program efficiency of p-type floating gate in n-channel split-gate embedded flash memory

AUTHOR(S)
Shih, Hung-Sheng; Fang, Shang-Wei; Kang, An-Chi; King, Ya-Chin; Lin, Chrong-Jung
PUB. DATE
November 2008
SOURCE
Applied Physics Letters;11/24/2008, Vol. 93 Issue 21, p213503
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
This work proposes a novel p-type boron-doped floating gate for n-channel split-gate flash memory. A lower program voltage, with a programming time of 7 μs, results in five times of the conventional source-side injection programming efficiency, a 5% wider program/erase window, and more reliable endurance characteristics. Additionally, a 2 Mbit embedded flash Intellectual Property (IP) has been successfully implemented and statistically compared. The lower program voltage reduces concerns around the high-voltage decoder, the charge pump efficiency, and the array efficiency beyond 90 nm nodes. The new p-doped split-gate structure provides a very promising solution for advanced embedded split-gate flash memory beyond the 90 nm node.
ACCESSION #
35605065

 

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