Hysteresis in In2O3:Zn nanowire field-effect transistor and its application as a nonvolatile memory device

Zhang, Wenfeng; Jie, Jiansheng; Luo, Linbao; Yuan, Guodong; He, Zhubing; Yao, Zhiqiang; Chen, Zhenhua; Lee, Chun-Sing; Zhang, Wenjun; Lee, Shuit-Tong
November 2008
Applied Physics Letters;11/3/2008, Vol. 93 Issue 18, p183111
Academic Journal
Control and utilization of hysteresis in nanodevices is an important issue. In this paper, we show an enormous hysteresis in zinc-doped In2O3 nanowire field-effect transistors. Various measurements including changing the operating atmosphere, ozone treatment, and surface passivation were performed to understand and control the hysteresis. The hysteresis could be readily controlled by modifying the nanowire surface. Utilizing the hysteresis, the as-fabricated devices can function as nonvolatile memory elements with high charge storage stability exceeding 4 h. We propose that chemical species such as water molecules adsorbed on the devices and surface oxygen defects in the amorphous layer mainly originated from Zn2+ substitution of In3+ are the main causes of the large hysteresis and the nonvolatile memory effect.


Related Articles

  • Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors. Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu // Applied Physics Letters;2/27/2012, Vol. 100 Issue 9, p093106 

    Through the structural modification of a three-dimensional silicon nanowire field-effect transistor, i.e., a double-gate FinFET, a structural platform was developed which allowed for us to utilize graphene oxide (GO) as a charge trapping layer in a nonvolatile memory device. By creating a...

  • Degradation mechanisms of organic ferroelectric field-effect transistors used as nonvolatile memory. Ng, Tse Nga; Russo, Beverly; Arias, Ana Claudia // Journal of Applied Physics;Nov2009, Vol. 106 Issue 9, p094504-1 

    Organic ferroelectric field-effect transistors were fabricated by inkjet printing for use as nonvolatile memory. Changes in device hysteresis were measured for 7 days to determine the limiting properties that restrict memory retention time. It was found that shifts in threshold voltage...

  • Programming/Erasing Characteristics of Hysteresis-Based Nonvolatile Memory Devices of Single-Wall Carbon Nanotubes. Ao Guo; Yunyi Fu; Lunhui Guan; Jia Liu; Chuan Wang; Falong Zhou; Zujin Shi; Zhennan Gu; Ru Huang; Xing Zhang // Current Nanoscience;Aug2008, Vol. 4 Issue 3, p251 

    Hysteresis effect in carbon nanotube field-effect transistors can be commonly employed to construct the nonvolatile memory devices of single-wall carbon nanotubes. In this paper, we investigate in detail the programming/erasing characteristics of such memory devices, which may present great...

  • Synthesis and characterization of aerosol silicon nanocrystal nonvolatile floating-gate memory devices. Ostraat, M. L.; De Blauwe, J. W.; Green, M. L.; Bell, L. D.; Brongersma, M. L.; Casperson, J.; Flagan, R. C.; Atwater, H. A. // Applied Physics Letters;7/16/2001, Vol. 79 Issue 3 

    This letter describes the fabrication and structural and electrical characterization of an aerosol-nanocrystal-based floating-gate field-effect-transistor nonvolatile memory. Aerosol nanocrystal nonvolatile memory devices demonstrate program/erase characteristics comparable to conventional...

  • Low-standby-power SRAM cell promises high-density memories. Bursky, Dave // Electronic Design;01/20/97, Vol. 45 Issue 2, p27 

    Reports on the development of an advanced memory cell that reduces the standby power of static-RAM memory of cells used in III/V- or silicon-based circuits. Allowance of much higher levels of integration for high-speed circuits; Combination of two heterostructure field-effect transistors; Two...

  • Record Endurance for Single-Walled Carbon Nanotube-Based Memory Cell. Di Bartolomeo, A.; Yang, Y.; Rinzan, M.; Boyd, A.; Barbara, P. // Nanoscale Research Letters;Nov2010, Vol. 5 Issue 11, p1852 

    We study memory devices consisting of single-walled carbon nanotube transistors with charge storage at the SiO/nanotube interface. We show that this type of memory device is robust, withstanding over 10 operating cycles, with a current drive capability up to 10 A at 20 mV drain bias, thus...

  • Electronic transport characteristics of electrolyte-gated conducting polyaniline nanowire field-effect transistors. Seung-Yong Lee; Gyoung-Rin Choi; Hyuneui Lim; Kyung-Mi Lee; Sang-Kwon Lee // Applied Physics Letters;7/6/2009, Vol. 95 Issue 1, p013113 

    We investigate the electronic transport characteristics of an electrolyte-gated conducting polyaniline (PANI) nanowire field-effect transistor (FET) assembled between two Au electrodes on SiO2/Si substrate using nanochannel-assisted chemical oxidative polymerization. This is the first...

  • Room temperature operation of Si single-electron memory with self-aligned floating dot gate. Nakajima, Anri; Futatsugi, Toshiro; Kosemura, Kinjiro; Fukano, Tetsu; Yokoyama, Naoki // Applied Physics Letters;3/31/1997, Vol. 70 Issue 13, p1742 

    Develops a fabrication method for a silicon (Si) single-electron field effect transistor memory device. Structure of the field effect transistor; Ways to prevent vertical etching of the poly-Si layer; Details on the feasibility of practical single-electron memory.

  • Performance Analysis of Gate-All-Around Field Effect Transistor for CMOS Nanoscale Devices. Sharma, Awanit; Akashe, Shyam // International Journal of Computer Applications;Dec2013, Vol. 84, p44 

    This paper explains the performance analysis of Gate-All-Around silicon nanowire with 80nm diameter field effect transistor based CMOS based device utilizing the 45-nm technology. Simulation and analysis of nanowire (NW) CMOS inverter show that there is the reduction of 70% in leakage power and...


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics