TITLE

Synopsys donates VMM methodology library, apps to standards group

AUTHOR(S)
Mutschler, Ann Steffora
PUB. DATE
May 2008
SOURCE
Electronic News;5/19/2008, Vol. 54 Issue 20, p3
SOURCE TYPE
Trade Publication
DOC. TYPE
Article
ABSTRACT
The article informs that the semiconductor design and manufacturing software company Synopsys Inc. has given its SystemVerilog verification methodology into standards group Accellera for use in developing verification standards. To support verification interoperability standardization in the semiconductor design industry, Synopsys Inc. has reported that it is donating its complete implementation of the Verification Methodology Manual (VMM) to standards organization Accellera.
ACCESSION #
32520249

 

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