TITLE

DATALIGHT FLASH FILE FOR LINUX 400% FASTER THAN JFFS2

PUB. DATE
March 2008
SOURCE
UNIX Update;Mar2008, Vol. 19 Issue 3, p6
SOURCE TYPE
Trade Publication
DOC. TYPE
Article
ABSTRACT
The article focuses on the release of a Linux version of the flash file system platform from Datalight Inc. The platform is a combination of FlashFX Pro intelligent flash media manager and Datalight Reliance high-integrity file system. According to the article, the platform delivers 400% faster write performance and five times faster mount speeds when compared to JFFS2. Due to their performance, time-to-market advantages, and reliability, Datalight's flash file system products are deployed with most handset manufacturers, and several communications, aerospace, military, and industrial customers.
ACCESSION #
30001580

 

Related Articles

  • A Microprogramming Logic. Damm, Werner // IEEE Transactions on Software Engineering;May88, Vol. 14 Issue 5, p559 

    We present a universal syntax-directed proof-system for the verification of horizontal computer-architectures. The system is based on the axiomatic architecture description language AADL, which is sufficiently rich to allow the specification of target-architectures while providing a concise...

  • A Verilog programming-language-interface primer. Mittra // EDN;09/02/99, Vol. 44 Issue 18, p75 

    Provides information on how to do hardware description language programming using Verilog. Reason for using a programming-language interface (PLI); Method for modifying the value of a register; Technique for creating the PLI routine. INSET: A short history of Verilog PLI..

  • Exporting a COSMOS Graph TO EXCEL. Boissat, Julien // Design News;11/21/2005, Vol. 60 Issue 17, p58 

    The article reports on the new computer program developed by COSMOS Technical Support Group that enables users to export response graphs to Excel. The procedure was created in response to customer demands which allow transfer of nonlinear, transient thermal, or drop test response result data to...

  • Increasing Productivity Through Vision Builder AI and LabVIEW Integration.  // Instrumentation Newsletter;2010 4th Quarter, Vol. 22 Issue 4, p11 

    The article focuses on the integration of Laboratory Virtual Instrumentation Workbench (LabVIEW) software and Vision Builder for Automated Inspection (AI) 2010 from National Instruments (NI) Corp. It says that the new image network shared variable is useful for viewing inspection images and...

  • Cadence, Mentor Team To Open Up SystemVerilog Verification. Maliniak, David // Electronic Design;9/13/2007, Vol. 55 Issue 20, p36 

    The article reports that the firms Cadence Design Systems Inc. and Mentor Graphics Corp. have decided to launch the Open Verification Methodology (OVM), a methodology for computer software designers and verification engineers which promotes data portability and interoperability. The methodology...

  • Toward Conceptual Specification of Communication Protocols. Al-Fedaghi, Sabah // International Journal of Future Generation Communication & Netwo;Feb2013, Vol. 6 Issue 1, p99 

    Communication Protocols are specified by using either formal or graphical notations. For this purpose, Specification and Description Language (SDL) is a formal language used extensively in telecommunication for development of software and hardware. Its diagrammatic version with complementary...

  • Play2: A New Era of Web Application Development. Drobi, Sadek // IEEE Internet Computing;Jul/Aug2012, Vol. 16 Issue 4, p89 

    Today's Web evolutions and the emergence of software as a service and Web services have led to new challenges in programming: distribution, scalability, management of various data formats, stream management, and so on. A Web framework that considers these issues can significantly aid developers...

  • Get a handle on design languages. Moretti, Gabe // EDN Europe;Jun2000, Vol. 45 Issue 6, p54 

    Focuses on hardware description languages (HDL). Introduction of Verilog by Gateway Design Automation; Disadvantages of Verilog and Very high speed integrated circuits HDL; Details of the proposals to enhance Verilog; Use of C++ for system design; Organization of Open SystemC to describe...

  • Interfacing VHDL and Verilog Designs to C++ Models. Mitchell, Donna // ECN: Electronic Component News;Nov2002 Part 1 of 2, Vol. 46 Issue 13, p89 

    Focuses on the integration of VHDL and Verilog designs into C++ models. Assessment of the syntax and library function; Automation of generating model codes; Enhancement of the data structures.

Share

Read the Article

Courtesy of THE LIBRARY OF VIRGINIA

Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics