Qimonda Ships First GDDRS Samples

November 2007
Portable Design;Nov2007, Vol. 13 Issue 11, p11
The article announces that Qimonda AG has shipped the industry's first 512 megabit Graphics Double Data Rate 5 (GDDR5) samples to customers. According to Robert Feurle, vice president of Business Unit Graphics at Qimonda, the company is pleased that they can support the GDDR5 activities of their customers with this first sample shipment, which is a major step to ensure the fast introduction into the Graphics Market. GDDR5 is targeted to become the next predominant graphics dynamic random access memory(DRAM) standard and will boost memory bandwidth of graphics applications to a new dimension. Its standard is about to get finalized in Joint Electron Device Engineering Council (JEDEC) where industry participants jointly defined this leading-edge graphics standard over the last years.


Related Articles

  • Qimonda starts volume Rambus DRAM production for PS3. Deffree, Suzanne // Electronic News;9/1/2008, Vol. 54 Issue 35, p8 

    The article reports that Qimonda AG has announced that it has started shipping Rambus XDR DRAM in volume for the Playstation 3 (PS3) system. Qimonda started to ship first samples of the 512-Mb XDR DRAM in January, 2008 as part of the Germany-based memory maker's product diversification in non-PC...

  • Double Data Rate 2 Synchronous Dynamic Random Access Memory Hardware.  // Network Dictionary;2007, p161 

    An encyclopedia entry for "Double Data Rate 2 Synchronous Dynamic Random Access Memory (DDR2-SDRAM)" is presented. Compared to DDR-SDRAM, DDR2-SDRAM offers greater bandwidth and density in a smaller package and reduced power consumption. It also enables a higher clock rate and data rate...

  • High-Speed Memory Interfaces in Mobile Devices. Gardner, Brian // Portable Design;Nov2007, Vol. 13 Issue 11, p16 

    The article features the high-speed memory interfaces in mobile devices. Cellular phone requires over 100 interface signals running different protocols at different frequencies. As new features are added, the amount and speed of off-chip memories are increasing at a dramatic rate and battery...

  • Synchronous DRAM.  // Network Dictionary;2007, p472 

    An encyclopedia entry for "Synchronous DRAM" or "SDRAM" is presented. It refers to a type of DRAM that can run at higher clock speed than a conventional DRAM. It has a synchronous interface, waiting for a clock pulse before responding to its control inputs. The clock is used to drive an internal...

  • Crucial Goes Ballistix.  // Micro Mart;Sep2014 Special, Issue 1330, p56 

    The article offers information on the Ballistix Sport DDR4 memory and DD4 desktop memory from the memory and flash storage manufacturer Crucial.

  • Qimonda cuts deal to target industrial apps.  // Electronics Weekly;4/9/2008, Issue 2330, p22 

    The article reports that Munich, Germany-based memory supplier Qimonda has started a distribution partnership with EBV Elektronik covering its dynamic random access memory (DRAM) modules and standalone memory devices. The deal is part of Qimonda's diversification into non-computer memory markets...

  • DRAM Revenue to Reach $40 Billion in 2010: Report.  // Channel Insider;9/7/2010, p1 

    The article offers information concerning the report of Research & Markets Ltd. related to the revenue of the dynamic random access memory (DRAM) market in the U.S. It notes that the DRAM industry will experience a strong growth in revenues by 40 billion dollars throughout 2010. It also notes...

  • Optimal Use of Hsiao Codes to the Cache Level of a Memory Hierarchy. Novac, Ovidiu; Novac, Mihaela; Vladu, Ecaterina; Vari-Kakas, Stefan // Journal of Computer Science & Control Systems;2010, Vol. 3 Issue 1, p151 

    The Hsiao code is an optimal SEC-DED code, for single error correction and double-error detection. Hsiao code and Hamming code are able to correct single-bit errors and detect double-bit errors in a codeword. Also the HSIAO code is an odd-weight-column SEC-DED code. In this paper we will apply a...

  • Untitled.  // Electronics Weekly;6/27/2012, Issue 2513, p8 

    The article offers information regarding the options available for adding larger amount of memory on system-on-chip (SoC) semiconductor devices. The options includes Static random-access memory (SRAM), Dynamic random-access memory (DRAM), and Chip-on-chip. It mentions that SRAM is the simplest...


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics