IMEC Extends Its CMOS Device Scaling Program with Research on DRAM Technology

November 2007
Portable Design;Nov2007, Vol. 13 Issue 11, p8
The article reports that IMEC has initiated research on next-generation dynamic random access memory metal-insulator-metalcapacitors (DRAM MIMCAP) process technology as part of its (sub-)32 nanometer complementary metal oxide semiconductors (CMOS) device scaling program. This research will enable IMEC and its partners to address the material and integration requirements to scale DRAM MIMCAP to future technology generations. This newly added focus follows an earlier extension of its traditional logic- and SRAM-oriented program with a DRAM periphery transistor sub-program in November 2006. The objective of the latter sub-program is to research high-k and metal gate options sustaining a DRAM-oriented process flow.


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