TITLE

Compiler attempts to address the timing closure challenge

AUTHOR(S)
Ajluni, Cheryl
PUB. DATE
January 2000
SOURCE
Electronic Design;01/24/2000, Vol. 48 Issue 2, p41
SOURCE TYPE
Trade Publication
DOC. TYPE
Article
ABSTRACT
Focuses on Synopsys Inc.'s Physical Compiler software, which helps achieve timing closures with current complex integrated circuit designs. Uses of the software for front-end and back-end designers; Includes register-transfer-level-to-placed-gates capability; Elimination of the need for wire load models and iterations between logical and physical design.
ACCESSION #
2751255

 

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