TITLE

French spin-off plans commercial MRAM next year

AUTHOR(S)
Manners, David
PUB. DATE
June 2006
SOURCE
Electronics Weekly;6/28/2006, Issue 2247, p16
SOURCE TYPE
Trade Publication
DOC. TYPE
Article
ABSTRACT
The article reports that Crocus Technology is planning to provide the first commercial memory products in 2007. The Grenoble, France-based magnetic random access memory (MRAM) developer has raised $17 million in first round funding. Jean-Pierre Braun, Crocus' chief executive, said that they would try to bring MRAM that will fulfill the customers' expectations.
ACCESSION #
21842172

 

Related Articles

  • Tower to manufacture MRAM from Crocus, invests $1.25M. Deffree, Suzanne // Electronic News (10616624);6/22/2009, Vol. 55 Issue 24, p2 

    The article reports that Crocus Technology SA and Tower Semiconductor Ltd. have agreed to port Crocus' Magnetoresistive Random Access Memory (MRAM) process technology into Tower's 200-mm Fab2 facility. Israel-based Tower is also taking an equity position in California-based Crocus, valued at...

  • Challenges toward gigabit-scale spin-transfer torque random access memory and beyond for normally off, green information technology infrastructure (Invited). Kawahara, Takayuki // Journal of Applied Physics;Apr2011, Vol. 109 Issue 7, p07D325 

    If spin-transfer torque RAM (SPRAM) technology is used as a true nonvolatile RAM, it will be able to provide normally 'off' and instant 'on' functions. This would drastically reduce the power consumption of information technology (IT) equipment and its infrastructure while preserving high...

  • Rambus marches on main memory. Romanelli, Alex // Electronics Weekly;7/16/2003, Issue 2108, p5 

    Announces the launching of Rambus' XDR DRAM memory technology, formerly codenamed Yellowstone. Expectation of Rambus and analysts on the technology; Advantage of the technology to central processing unit attach to dynamic random access memory (DRAM).

  • Innovative flash memories match DRAM densities. Bursky, Dave // Electronic Design;5/16/94, Vol. 42 Issue 10, p69 

    Focuses on flash memory technology. Comparison with dynamic random access memories (DRAM); Performance; Features; Applications; Discussion on the NOR-cell type and NAND-cell architectures. INSETS: The origins of flash.;The differences between NAND and NOR flash memories..

  • Micron Rolls Out Gigabit 0.11-Micron DDR SDRAM.  // Electronic News;12/30/2002, Vol. 48 Issue 53, pN.PAG 

    Features the 2.5v gigabit DDR SDRAM components of memory maker Micron Technology. Capabilities of the product; Statement from Terry Lee, executive director of advanced technology and strategic marketing of Micron.

  • Static Noise Margin Analysis during Read Operation of 7T SRAM Cells in 45nm Technology for Increase Cell Stability. Tomar, Shelendra Singh; Singh, Madhav; Akashe, Shyam // International Journal of Engineering Science & Technology;2011, Vol. 3 Issue 9, p7180 

    In this paper we introduce Noise (the Static Noise present in 7T SRAM cell) effect the stability of cell. Actually SNM is present in SRAM cell which is effect the stability in read operation of the 7T SRAM cells. SRAM cell stability analysis is a based on Static Noise Margin (SNM) investigation...

  • RAM revolution. Stan, Nick // Australian Personal Computer;Jan1995, Vol. 16 Issue 1, p14 

    Discusses improvement in storage density of dynamic random access memory (DRAM) in the light of development of new designs in 1995. Information about expected DRAM technologies.

  • Improvement switching characteristics of toggle magnetic random access memory with dual polarity write pulse scheme. Yuan-Jen Lee; Chien-Chung Hung; Ding-Yeong Wang; Cheng-Tyng Yen; Wei-Chuan Chen; Shan-Yi Yang; Kuei-Hung Shen; Yung-Hung Wang; Yung-Hsiang Chen; Ming-Jer Kao; Ming-Jinn Tsai // Applied Physics Letters;1/15/2007, Vol. 90 Issue 3, p032503 

    The writing probability of toggle magnetic random access memory (MRAM) at built-in bias field is studied by micromagnetic simulation and a dual polarity write pulse scheme has been proposed to enhance the toggle probability at low writing field. The critical writing field can be reduced to 19 Oe...

  • Micron Technology sees logic in memory-centric embedded chips. Bush, Steve // Electronics Weekly;5/8/2002, Issue 2051, p17 

    Reports that dynamic random access memory maker Micron Technology has moved into memory-centric embedded processors with the introduction of a product called SOC-G0. Design behind the SOC-G0; Remarks from Dean Klein, vice-president of market development at Micron; Features of the SOC-G0.

Share

Read the Article

Courtesy of VIRGINIA BEACH PUBLIC LIBRARY AND SYSTEM

Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics