Cores lower entry cost for custom SOCs

Cravotta, Robert
March 2006
EDN;3/16/2006, Vol. 51 Issue 6, p22
Trade Publication
The article provides information on the Diamond Standard family of processor configurations of Tensilica which is based on the Xtensa architecture. Each core implements the Xtensa instruction-set architecture in a five-stage pipeline, 32-bit architecture. The family consists the 108Mini, a cacheless RISC-controller processor, which delivers lower power consumption than ARM7-based approaches. The price for the Diamond 108Mini is $75,000 for a single-use license with a royalty fee of 5 cents per core. Tensilica's XCC optimizing compiler and Eclipse-based Xplorer IDE support software development on these processors with a clock-cycle accurate, pipeline-modeled instruction-set simulator.


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