Future of SoC design: Processors everywhere

Rowen, Chris
November 2005
Portable Design;Nov2005, Vol. 11 Issue 11, p29
The article describes a vision of advanced system on chip (SoC) architecture for the next 10 years, where the typical design is constricted from a large number of processors used in a diversity of rules. It is based on a model of processor scaling drives. Silicon scaling makes three trends unstoppable: 1) the growing necessity for pervasive programmability, 2) displacement of generic processors by automatically generated and optimized processors for higher efficiency, and 3) computational requirements that are outpacing progress in circuit speed and power density. These trends are captured in a quantitative prediction for digital-system design as a "law of SoC processor scaling," based on the International Technology Roadmap for Semiconductors (ITRS).


Related Articles

  • Analog foundry processing demands robust PDK. Hutter, Lou N. // Solid State Technology;Apr2010, Vol. 53 Issue 4, p24 

    The author reflects on the significance of process design kit (PDK) on analog foundry processing. The author opines that since integrated device manufacturers (IDM) have turned their attention towards fab-lite and fabless business models, analog PDK would be a critical success driver. The author...

  • Design Out Soft-Error Susceptibility. Maliniak, David // Electronic Design;2/3/2005, Vol. 53 Issue 3, p30 

    This article focuses on soft errors in the computer designs. Soft errors, which are induced by cosmic rays, alpha particles, and thermal neutrons increasingly dominate IC reliability at nanometer geometries. Yet a new design platform from iRoC Technologies gives designers a way to accurately...

  • Packaging Rides the Z Axis into the Third Dimension. Allan, Roger // Electronic Design;10/13/2005, Vol. 53 Issue 22, p46 

    This article reports that the push for 3D packaging of semiconductor integrated circuits (ICs) directly results from market demands for smaller and lower-profile, lighter, and lower-cost packaged ICs that consume less power. With such market forces at play, package designers are feeling the...

  • "Bulking up" with direct silicon bonding. D. V. // Solid State Technology;Jul2006, Vol. 49 Issue 7, p22 

    The article reports that a modification by Silicon Genesis Corp. of a layer-transfer process allows direct silicon bonding (DSB) and electrically attaching a film of single-crystal silicon of various crystal orientations onto a base substrate. The resulting DSB substrate has bulk-like...

  • SRC and SIA Kick off SoC Design Challenge.  // Advanced Packaging;Dec2004, Vol. 13 Issue 12, p8 

    The article reports that the Semiconductor Research Corp. (SRC) and the Semiconductor Industry Association (SIA) have challenged North American university students to a low power system-on-chip design that demonstrates the value of greater systems integration in integrated circuit (IC) design....

  • Microelectronics: Differential Amplifiers. EMILIO, MAURIZIO DI PAOLO // Electronics World;Feb2014, Vol. 120 Issue 1934, p42 

    The article reports on the fundamentals of microelectronics, particularly differential amplifiers. It discusses the differential amplifier configuration as a main part of an integrated circuit (IC) design and highlights its features, including high input resistance, minimal temperature drift,...

  • The fabless semiconductor business model still works. Lamb, Kenn // Electronics Weekly;Nov2008 Electronica Supplement, p24 

    The article presents the author's views on the fabless semiconductor business. He maintains that very few European venture capitalists will show interest in fabless semiconductor start-ups because of the costs involved in developing complex systems on a chip (SoC) and application software for...

  • Design in an analog world. Israelsohn, Joshua // EDN;11/11/2004 Supplement2, Vol. 49, p46 

    The article focuses on the challenges facing analog design. Analog-design talent has become harder to find and more expensive to develop at the same time that digital products and processes have hit constraints due to fundamental analog effects. The demands on analog design have grown with the...

  • Extreme low-power design. Andersen, Dean // EDN;5/10/2007, Vol. 52 Issue 10, p65 

    The article focuses on the power consumption of the digital system on chip (SOC) used in modern implantable medical devices, such as pacemakers and cardioverter defribillators. Power management techniques to reduce SOC power is offered. Logic circuits can consume power from three sources...


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics