TITLE

A 1 bit binary-decision-diagram adder circuit using single-electron transistors made by selective-area metalorganic vapor-phase epitaxy

AUTHOR(S)
Miyoshi, Yoshihito; Nakajima, Fumito; Motohisa, Junichi; Fukui, Takashi
PUB. DATE
July 2005
SOURCE
Applied Physics Letters;7/18/2005, Vol. 87 Issue 3, p033501
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
We demonstrate single-electron operation of a 1 bit adder circuit using GaAs single-electron tunneling transistors (SETs). GaAs dot and wire coupled structures for the fabrication of SETs were grown by a selective-area metalorganic vapor-phase epitaxy technique. The logic circuit was realized based on a binary decision diagram architecture using Coulomb blockade (CB) in GaAs dots and switching operations were achieved in a single-electron mode because of the CB effects. Through this architecture, a 1 bit adder circuit was realized with three SETs, two of which were for AND logic and one with two input gates for exclusive OR (XOR). Both AND and XOR operations were demonstrated at 1.9 K, which indicated successful fabrication of the 1 bit adder.
ACCESSION #
18008281

 

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