Fabrication and characterization of vertical-type, self-aligned asymmetric double-gate metal-oxide-semiconductor field-effect-transistors

Masahara, Meishoku; Liu, Yongxun; Ishii, Kenichi; Sakamoto, Kunihiro; Matsukawa, Takashi; Tanoue, Hisao; Kanemaru, Seigo; Suzuki, Eiichi
March 2005
Applied Physics Letters;3/21/2005, Vol. 86 Issue 12, p123512
Academic Journal
For gate work function engineering required for ultrathin channel (UTC) double-gate (DG) metal-oxide-semiconductor field-effect-transistor (MOSFET), threshold voltage (Vth) tuning of self-aligned asymmetric (n+–p+) DG MOSFETs have been experimentally investigated in comparison with symmetric (n+–n+) DG MOSFETs. The vertical UTCs (12–32 nm) were fabricated on bulk Si substrates by utilizing the novel ion-bombardment-retarded wet etching and the self-aligned asymmetric DGs were formed by employing the tilted ion implantation and anisotropic dry etching. The fabricated vertical asymmetric DG n-MOSFET with the gate length of 100 nm clearly exhibits the desirable Vth of +0.1 V, in addition to the unique DG MOSFET characteristics of the high short-channel-effect immunity with decreasing a channel thickness.


Related Articles

  • B18H22 Implantation for the Source-Drain Extension in 45 nm-node PMOSFETs and Beyond. Kawasaki, Y.; Endo, S.; Kitazawa, M.; Maruyama, Y.; Yamashita, T.; Kuroi, T.; Yoshimura, H.; Kojima, M. // AIP Conference Proceedings;11/3/2008, Vol. 1066 Issue 1, p391 

    We investigated the application properties of cluster implantation for MSA processing. We successfully replaced BF2 with B18H22 to SDE implantation in pMOSFETs with the activation processing of MSA and spike-RTA. In the activation processing with only MSA, we found from blank wafer that B18H22...

  • Ion Beam Control and Transistor Characteristics for 45 nm Source-Drain Extension Formation. Okabe, K.; Nishikawa, M.; Ikeda, K.; Kurata, H.; Mori, T.; Satoh, S.; Kase, M. // AIP Conference Proceedings;11/3/2008, Vol. 1066 Issue 1, p26 

    The beam trajectory and divergence angle is systematically examined with ion source parts degradation and focusing condition. We clarified that the variation and drive current of NMOSFET transistor characteristics are related the beam angle conditions, using our advanced logic transistor of 45...

  • Nanocluster memories by ion beam synthesis of Si in SiO2. SCHMIDT, B.; HEINIG, K.-H.; RÕNTZSCH, L.; STEGEMANN, K.-H. // Materials Science (0137-1339);2007, Vol. 25 Issue 4, p1213 

    Ion implantation and ion irradiation induced interface mixing were used to synthesise silicon nano-clusters in the gate oxide of metal--oxide--semiconductor (MOS) structures aiming at electronic memory applications. In the present study silicon nanocrystals for multi-dot floating-gate memories...

  • Improved Re-Crystallization of p+ Poly-Si Gates with Molecular Ion Implantation. Lee, Jin-Ku; Ju, Min-Ae; Oh, Jae-Geun; Hwang, Sun-Hwan; Jeon, Seung-Joon; Ku, Ja-Chun; Park, Sungki; Lee, Kyung-Won; Kim, Steve; Ra, Geum-Joo; Reece, Ron; Rubin, Leonard M.; Krull, W. A.; Cho, H. T. // AIP Conference Proceedings;11/3/2008, Vol. 1066 Issue 1, p395 

    Implantation of B18H22 molecules at 80 keV and doses up to 4×1016 cm-2 were evaluated for the application of p-type counterdoping of in situ n-type doped polysilicon gates. Compared to conventional B implants, molecular implantation provides greatly improved throughput without the risk of...

  • Angle Effects in High Current Ion Implantation. Olson, Joseph C.; Campbell, Christopher; Suguro, Kyoichi; Kawase, Yoshimasa; Ito, Hiroyuki // AIP Conference Proceedings;11/3/2008, Vol. 1066 Issue 1, p129 

    Previous studies conducted on batch high current implanters with 130 nm devices[1] have shown the importance of implant angle during source-drain (SD) and source-drain extension (SDE) implants. For these implants, errors in implant angle lead to device asymmetry and this device asymmetry has...

  • Novel Approach to Conformal FINFET Extension Doping. Zschätzsch, G.; Hoffmann, T. Y.; Horiguchi, N.; Hautala, J.; Shao, Y.; Vandervorst, W. // AIP Conference Proceedings;1/7/2011, Vol. 1321 Issue 1, p23 

    This paper presents a novel strategy to achieve conformal FINFET extension doping with low tilt-angle beam-line ion implantation. The process relies on the self-aligned cap layer formation exclusively on top of the FIN to tune doping levels in this particular area by partial dopant trapping. The...

  • A study on interface and charge trapping properties of nitrided n-channel... Lai, P.T.; Xu, J.P.; Lo, H. B.; Cheng, Y. C. // Journal of Applied Physics;8/15/1997, Vol. 82 Issue 4, p1947 

    Investigates the interface and oxide-charge trapping characteristics of bombarded metal-oxide-semiconductor field-effect transistors. Interface state density decreases; Oxide charge trapping properties; Stress compensation.

  • Room-temperature single-electron charging phenomena in large-area nanocrystal memory obtained by low-energy ion beam synthesis. Kapetanakis, E.; Normand, P.; Tsoukalas, D.; Beltsios, K. // Applied Physics Letters;4/15/2002, Vol. 80 Issue 15, p2794 

    We investigated the dependence of implantation dose on the charge storage characteristics of large-area n-channel metal–oxide–semiconductor field-effect transistors with 1-keV Si[sup +]-implanted gate oxides. Gate bias and time-dependent source–drain current measurements are...

  • Effect of channeling of halo ion implantation on threshold voltage shift of metal oxide.... Hyunsang Hwang; Dong Hoon Lee // Applied Physics Letters;2/12/1996, Vol. 68 Issue 7, p938 

    Examines the effect of halo ion implantation channeling on the threshold voltage shift of metal oxide semiconductor field-effect transistor (MOSFET). Role of cap oxide layer and halo implantation energy for dopant channeling; List of methods to reduce the short channel effects; Use of twin-well...


Read the Article


Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics