TITLE

Synopsys Joins FPGA Fray

AUTHOR(S)
Sperling, Ed
PUB. DATE
March 2004
SOURCE
Electronic News;3/22/2004, Vol. 50 Issue 12, pN.PAG
SOURCE TYPE
Trade Publication
DOC. TYPE
Article
ABSTRACT
Reports on the launch of Synopsys' Design Complier FPGA which targets chip designers who are working on the biggest and most complex field programmable gate arrays (FPGA). Features of the product; Major players in the FPGA market; Reason for the slow adoption of the technology.
ACCESSION #
12858801

 

Related Articles

  • SERDES Interfaces in an FPGA World: How to Get Started. Sides, Dan; Leigh, Bertrand // Wireless Design & Development;Jun2007, Vol. 15 Issue 6, p36 

    The article focuses on the use of serialized deserializer (SERDES) in field programmable gate array (FPGA) products. The concept of SERDES is rooted on the migration from lower data rate parallel connections to higher speed serial connections. Source synchronous and clock data protocols are the...

  • Context Switching in a Run-Time Reconfigurable System. Puttegowda, Kiran; Lehn, David I.; Park, Jae H.; Athanas, Peter; Jones, Mark // Journal of Supercomputing;Nov2003, Vol. 26 Issue 3, p239 

    A distinguishing feature of reconfigurable computing over rapid prototyping is its ability to configure the computational fabric on-line while an application is running. Conventional reconfigurable computing platforms utilize commodity FPGAs, which typically have relatively long configuration...

  • Improving Instrumentation With User-Programmable FPGAs. Schreier, Luke // EE: Evaluation Engineering;Jul2008, Vol. 47 Issue 7, p46 

    The article reports that virtual instruments are starting to incorporate user-available field-programmable gate arrays (FPGAs) in response to more demanding applications that require response times within a clock cycle, computation of large data sets or extremely fast data transfer. Reducing the...

  • Out-of-box design puts embedded kits on FPGAs.  // Process & Control Engineering (PACE);Feb2004, Vol. 57 Issue 1, p39 

    Reports on the launch of Nexar, a vendor-independent solution for system-level design on a field-programmable gate array (FPGA) platform from Altium. Use of NanoBoard, a reconfigurable FPGA-based development board that can interact with processor cores and instruments; Integration of Altium's...

  • FPGA integrators are still asking a lot from design and development tools. Keller, John // Military & Aerospace Electronics;Jul2007, Vol. 18 Issue 7, p23 

    The article discusses the innovations in the field programmable gate arrays (FPGA). FPGAs are immensely complex devices, which many consider it to be integrated systems unto themselves, with their own unique hardware and software issues rather than just integrated circuits. Most advanced FPGAs...

  • High noon for FPGAs: LOW-COST-VERSUS-HIGH-END SHOWDOWN. Santarini, Michael // EDN;11/8/2007, Vol. 52 Issue 23, p37 

    The article addresses the competition between low-cost and high-end field programmable gate arrays (FPGA). In the high-end FPGA market, customers primarily have a choice between either Xilinx's Virtex devices or Altera's Stratix family. On the other hand, in the low-cost FPGA market, customers...

  • DESIGNING AN ACCESSIBLE BOARD. WILSON, RON // EDN;10/8/2009, Vol. 54 Issue 19, p24 

    The article discusses the board design that is accessible for debugging and verification during the development of the product. Particular focus is given to a systematic approach for attaining this goal, which involves understanding the functions of the board and preparing measures to verify the...

  • FPGA soft cores reach 200 MIPS. Prophet, Graham // EDN Europe;Jul2004, Vol. 49 Issue 7, p10 

    Features Altera's second-generation soft-core-embedded Nios II field programmable gate array (FPGA) processor. Target usage models; Availabile versions of the system; Capabilities and uses of Nios.microprocessors

  • VIRTEX-4 MAKES ITS ENTRANCE. Prophet, Graham // EDN Europe;Jul2004, Vol. 49 Issue 7, p10 

    Features Xilinx's Virtex-4 series of field programmable gate arrays (FPGA). Application-specific-modular-block (ASMBL) architecture of the system; Virtex-4 models; Speed performance.

Share

Read the Article

Courtesy of THE LIBRARY OF VIRGINIA

Sorry, but this item is not currently available from your library.

Try another library?
Sign out of this library

Other Topics