Characteristics of SiO[sub 2]/n-GaN interfaces with β-Ga[sub 2]O[sub 3] interlayers

Nakano, Yoshitaka; Kachi, Tetsu; Jimbo, Takashi
November 2003
Applied Physics Letters;11/24/2003, Vol. 83 Issue 21, p4336
Academic Journal
We report on the characteristics of SiO[sub 2]/n-GaN metal-oxide-semiconductor (MOS) structures with β-Ga[sub 2]O[sub 3] interlayers. β-Ga[sub 2]O[sub 3] 15 nm thick was grown by dry oxidation at 800 °C for 6 h, and 100-nm-thick SiO[sub 2] was then deposited by sputtering. Capacitance–voltage measurements show a low interface trap density of ∼3.9×10[sup 10] eV[sup -1] cm[sup -2], probably indicating an unpinning of the surface Fermi level. Additionally, current–voltage measurements display a low leakage current of ∼1.2 μA/cm2 at a gate voltage of +20 V, regardless of rough oxide surface, as confirmed by atomic force microscopy observations. Thus, the stacked SiO[sub 2]/β-Ga[sub 2]O[sub 3] insulator is found to improve both the electrical interface properties and the gate dielectric characteristics of the GaN MOS structures. © 2003 American Institute of Physics.


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