Single-electron transistors in heterostructure nanowires

Thelander, C.; Mårtensson, T.; Björk, M.T.; Ohlsson, B.J.; Larsson, M.W.; Wallenberg, L.R.; Samuelson, L.
September 2003
Applied Physics Letters;9/8/2003, Vol. 83 Issue 10, p2052
Academic Journal
Semiconductor-based single-electron transistors have been fabricated using heterostructure nanowire growth, by introducing a double barrier of InP into InAs nanowires. From electrical measurements, we observe a charging energy of 4 meV for the approximately 55 nm diameter and 100 nm long InAs islands between the InP barriers. The Coulomb blockade can be periodically lifted as a function of gate voltage for all devices, which is a typical signature of single-island transistors. Homogeneous InAs nanowires show no such effect for the corresponding voltage ranges. © 2003 American Institute of Physics.


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