TITLE

Ultrathin silicon-on-insulator vertical tunneling transistor

AUTHOR(S)
Zaslavsky, A.; Aydin, C.; Luryi, S.; Cristoloveanu, S.; Mariolle, D.; Fraboulet, D.; Deleonibus, S.
PUB. DATE
August 2003
SOURCE
Applied Physics Letters;8/25/2003, Vol. 83 Issue 8, p1653
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
We have fabricated silicon-on-insulator (SOI) transistors with an ultrathin Si channel of ∼5 nm, tunneling gate oxide of ∼1 nm, and 100 nm gate length. In addition to good transistor characteristics, these same devices exhibit additional functionality at low temperature. The drain current I[sub D] exhibits steps near the turn-on threshold voltage as a function of the backgate V[sub BG] bias on the substrate. When operated as a gate-controlled tunneling device, with source shorted to drain and I[sub G] originating from tunneling from the gate to the channel, we observe structure in the I[sub G](V[sub BG]) due to resonant tunneling into the quantized channel subbands. In the future, as SOI device fabrication improves and the buried oxide thickness is reduced, these quantum effects will become stronger and appear at lower V[sub BG], offering the prospect of ultralarge scale integration-compatible devices with standard transistor operation or quantum functionality depending on the electrode biasing. © 2003 American Institute of Physics.
ACCESSION #
10603807

 

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