TITLE

Improvement in retention time of metal–ferroelectric–metal– insulator–semiconductor structures using MgO doped Ba[sub 0.7]Sr[sub 0.3]TiO[sub 3] insulator layer

AUTHOR(S)
Tseng, T. Y.; Lee, S. Y.
PUB. DATE
August 2003
SOURCE
Applied Physics Letters;8/4/2003, Vol. 83 Issue 5, p981
SOURCE TYPE
Academic Journal
DOC. TYPE
Article
ABSTRACT
We report the results of the fabrication and characterization of Pt/Bi[SUB3.35]La[SUB0.85]Ti[SUB3]O[SUB12] (BLT)/LaNiO[SUB3] (LNO)/Ba[SUB0.7]Sr[SUB0.3]TiO[SUB3] (BST)/Si metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structures for ferroelectric memory field effect transistor applications. The BLT films were deposited on LNO/BST/Si using the metalorganic decomposition method and annealed by rapid thermal annealing (RTA) process at 600 °C for 3 min. The ratio of remanent polarization to saturation polarization (P[SUBr]/P[SUBs]) increases with reducing area ratio, A[SUBF]/A[SUBI]. A large memory window of 3.1 V can be obtained for a small A[SUBF]/A[SUBI] ratio. By the utilization of 5 mol % MgO doped BST insulator layer, LNO bottom electrode layer for BLT, and small area ratio, A[SUBF]/A[SUBI] = &frac112; in the MFMIS structure, large P[SUBr]/P[SUBs ratio in BLT film and low leakage current and good capacitance matching of the ferroelectric and the insulator in the MFMIS structures have been achieved and, hence, long data retention time >10[SUP6] s has been obtained in this study. Experimental results demonstrate the significant progress in increase of the retention time of these structures, which make them attractive for practical ferroelectric memory field effect transistor applications.
ACCESSION #
10404903

 

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